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Searched refs:CXL_DOWNSTREAM_PORT_AER_OFFSET (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/hw/pci-bridge/
H A Dcxl_downstream.c32 #define CXL_DOWNSTREAM_PORT_AER_OFFSET 0x100 macro
34 (CXL_DOWNSTREAM_PORT_AER_OFFSET + PCI_ERR_SIZEOF)
177 rc = pcie_aer_init(d, PCI_ERR_VER, CXL_DOWNSTREAM_PORT_AER_OFFSET, in cxl_dsp_realize()