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Searched refs:CSD0_BASE_ADDR (Results 1 – 20 of 20) sorted by relevance

/openbmc/u-boot/include/configs/
H A Dflea3.h92 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
95 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
H A Dwoodburn_common.h99 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
102 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
H A Dmx35pdk.h104 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
109 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
H A Dts4800.h117 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
H A Dmx53evk.h109 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
H A Dmx53smd.h101 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
H A Dusbarmory.h85 #define PHYS_SDRAM CSD0_BASE_ADDR
H A Dkp_imx53.h88 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
H A Dmx53cx9020.h142 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
H A Dmx51evk.h169 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
H A Dmx53ard.h156 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
H A Dmx53loco.h152 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
H A Dmx53ppd.h177 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
H A Dm53menlo.h22 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
/openbmc/u-boot/arch/arm/cpu/arm1136/mx35/
H A Dmx35_sdram.c48 case CSD0_BASE_ADDR: in mx3_setup_sdram_bank()
/openbmc/u-boot/board/CarMediaLab/flea3/
H A Dflea3.c60 mx3_setup_sdram_bank(CSD0_BASE_ADDR, ESDCTL_DDR2_CONFIG, in board_setup_sdram()
/openbmc/u-boot/board/woodburn/
H A Dwoodburn.c53 mx3_setup_sdram_bank(CSD0_BASE_ADDR, ESDCTL_DDR2_CONFIG, in board_setup_sdram()
/openbmc/u-boot/arch/arm/include/asm/arch-mx5/
H A Dimx-regs.h18 #define CSD0_BASE_ADDR 0x90000000 macro
28 #define CSD0_BASE_ADDR 0x70000000 macro
/openbmc/u-boot/arch/arm/include/asm/arch-mx35/
H A Dimx-regs.h102 #define CSD0_BASE_ADDR 0x80000000 macro
/openbmc/u-boot/board/freescale/mx35pdk/
H A Dlowlevel_init.S100 mov r1, #CSD0_BASE_ADDR