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Searched refs:CQSPI_REG_IRQMASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/spi/
H A Dspi-cadence-quadspi.c201 #define CQSPI_REG_IRQMASK 0x44 macro
722 writel(CQSPI_IRQ_MASK_RD, reg_base + CQSPI_REG_IRQMASK); in cqspi_indirect_read_execute()
724 writel(CQSPI_REG_IRQ_WATERMARK, reg_base + CQSPI_REG_IRQMASK); in cqspi_indirect_read_execute()
740 writel(0x0, reg_base + CQSPI_REG_IRQMASK); in cqspi_indirect_read_execute()
776 writel(CQSPI_REG_IRQ_WATERMARK, reg_base + CQSPI_REG_IRQMASK); in cqspi_indirect_read_execute()
789 writel(0, reg_base + CQSPI_REG_IRQMASK); in cqspi_indirect_read_execute()
798 writel(0, reg_base + CQSPI_REG_IRQMASK); in cqspi_indirect_read_execute()
1027 writel(CQSPI_IRQ_MASK_WR, reg_base + CQSPI_REG_IRQMASK); in cqspi_indirect_write_execute()
1090 writel(0, reg_base + CQSPI_REG_IRQMASK); in cqspi_indirect_write_execute()
1101 writel(0, reg_base + CQSPI_REG_IRQMASK); in cqspi_indirect_write_execute()
[all …]
/openbmc/u-boot/drivers/spi/
H A Dcadence_qspi_apb.c117 #define CQSPI_REG_IRQMASK 0x44 macro
399 writel(0, plat->regbase + CQSPI_REG_IRQMASK); in cadence_qspi_apb_controller_init()