Searched refs:CP0_Config3 (Results 1 – 6 of 6) sorted by relevance
| /openbmc/qemu/target/mips/ |
| H A D | cpu-defs.c.inc | 67 .CP0_Config3 = MIPS_CONFIG3, 89 .CP0_Config3 = MIPS_CONFIG3, 109 .CP0_Config3 = MIPS_CONFIG3, 129 .CP0_Config3 = MIPS_CONFIG3, 149 .CP0_Config3 = MIPS_CONFIG3, 170 .CP0_Config3 = MIPS_CONFIG3 | (0 << CP0C3_VInt), 191 .CP0_Config3 = MIPS_CONFIG3, 212 .CP0_Config3 = MIPS_CONFIG3 | (0 << CP0C3_VInt), 234 .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSPP) | (0 << CP0C3_VInt), 256 .CP0_Config3 = MIPS_CONFIG3 | (0 << CP0C3_VInt), [all …]
|
| H A D | internal.h | 38 int32_t CP0_Config3; member 189 if (env->CP0_Config3 & (1 << CP0C3_VEIC)) { in cpu_mips_hw_interrupts_pending() 411 if (env->CP0_Config3 & (1 << CP0C3_LPA)) { in compute_hflags()
|
| H A D | cpu.h | 883 int32_t CP0_Config3; member 1328 return env->CP0_Config3 & (1 << CP0C3_MSAP); in ase_msa_available() 1340 return env->CP0_Config3 & (1 << CP0C3_MT); in ase_mt_available()
|
| /openbmc/qemu/target/mips/tcg/ |
| H A D | translate.h | 28 int32_t CP0_Config3; member 240 return ctx->CP0_Config3 & (1 << CP0C3_MT); in disas_mt_available()
|
| /openbmc/qemu/target/mips/tcg/system/ |
| H A D | cp0_helper.c | 1050 if (env->CP0_Config3 & (1 << CP0C3_ULRI)) { in helper_mtc0_hwrena() 1229 case 3: return other->CP0_Config3; in helper_mftc0_configx() 1253 env->CP0_Config3 = (env->CP0_Config3 & ~(1 << CP0C3_ISA_ON_EXC)) | in helper_mtc0_config3()
|
| /openbmc/qemu/target/mips/system/ |
| H A D | machine.c | 303 VMSTATE_INT32(env.CP0_Config3, MIPSCPU),
|