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Searched refs:CP0_Cause (Results 1 – 13 of 13) sorted by relevance

/openbmc/qemu/target/mips/sysemu/
H A Dcp0.c97 uint32_t old = env->CP0_Cause; in cpu_mips_store_cause()
107 env->CP0_Cause = (env->CP0_Cause & ~mask) | (val & mask); in cpu_mips_store_cause()
109 if ((old ^ env->CP0_Cause) & (1 << CP0Ca_DC)) { in cpu_mips_store_cause()
110 if (env->CP0_Cause & (1 << CP0Ca_DC)) { in cpu_mips_store_cause()
119 if ((old ^ env->CP0_Cause) & (1 << (CP0Ca_IP + i))) { in cpu_mips_store_cause()
120 cpu_mips_soft_irq(env, i, env->CP0_Cause & (1 << (CP0Ca_IP + i))); in cpu_mips_store_cause()
H A Dcp0_timer.c58 env->CP0_Cause |= 1 << CP0Ca_TI; in cpu_mips_timer_expire()
65 if (env->CP0_Cause & (1 << CP0Ca_DC)) { in cpu_mips_get_count()
88 if (env->CP0_Cause & (1 << CP0Ca_DC) || !env->timer) { in cpu_mips_store_count()
102 if (!(env->CP0_Cause & (1 << CP0Ca_DC))) { in cpu_mips_store_compare()
106 env->CP0_Cause &= ~(1 << CP0Ca_TI); in cpu_mips_store_compare()
129 if (env->CP0_Cause & (1 << CP0Ca_DC)) { in mips_timer_cb()
H A Dmachine.c292 VMSTATE_INT32(env.CP0_Cause, MIPSCPU),
/openbmc/qemu/hw/mips/
H A Dmips_int.c42 env->CP0_Cause |= 1 << (irq + CP0Ca_IP); in cpu_mips_irq_request()
44 env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP)); in cpu_mips_irq_request()
51 if (env->CP0_Cause & CP0Ca_IP_mask) { in cpu_mips_irq_request()
/openbmc/qemu/target/mips/tcg/sysemu/
H A Dtlb_helper.c1097 env->CP0_Cause &= ~(1U << CP0Ca_BD); in mips_cpu_do_interrupt()
1125 env->CP0_Cause &= ~(1U << CP0Ca_BD); in mips_cpu_do_interrupt()
1132 if (env->CP0_Cause & (1 << CP0Ca_IV)) { in mips_cpu_do_interrupt()
1139 uint32_t pending = (env->CP0_Cause & CP0Ca_IP_mask) >> CP0Ca_IP; in mips_cpu_do_interrupt()
1237 env->CP0_Cause = (env->CP0_Cause & ~(0x3 << CP0Ca_CE)) | in mips_cpu_do_interrupt()
1296 env->CP0_Cause |= (1U << CP0Ca_BD); in mips_cpu_do_interrupt()
1298 env->CP0_Cause &= ~(1U << CP0Ca_BD); in mips_cpu_do_interrupt()
1324 env->CP0_Cause = (env->CP0_Cause & ~(0x1f << CP0Ca_EC)) | in mips_cpu_do_interrupt()
1335 env->CP0_Status, env->CP0_Cause, env->CP0_BadVAddr, in mips_cpu_do_interrupt()
H A Dcp0_helper.c386 return other->CP0_Cause; in helper_mftc0_cause()
1138 old, old & env->CP0_Cause & CP0Ca_IP_mask, in helper_mtc0_status()
1139 val, val & env->CP0_Cause & CP0Ca_IP_mask, in helper_mtc0_status()
1140 env->CP0_Cause); in helper_mtc0_status()
/openbmc/qemu/target/mips/
H A Dgdbstub.c59 return gdb_get_regl(mem_buf, (int32_t)env->CP0_Cause); in mips_cpu_gdb_read_register()
H A Dkvm.c130 return env->CP0_Cause & (0x1 << (2 + CP0Ca_IP)); in cpu_mips_io_interrupts_pending()
481 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_CAUSE, &env->CP0_Cause); in kvm_mips_save_count()
523 err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_CAUSE, &env->CP0_Cause); in kvm_mips_restore_count()
H A Dinternal.h188 pending = env->CP0_Cause & CP0Ca_IP_mask; in cpu_mips_hw_interrupts_pending()
H A Dcpu.h809 int32_t CP0_Cause; member
H A Dcpu.c104 env->CP0_Status, env->CP0_Cause, env->CP0_EPC); in mips_cpu_dump_state()
/openbmc/qemu/linux-user/
H A Delfload.c1451 (*regs)[TARGET_EF_CP0_CAUSE] = tswapreg(env->CP0_Cause); in elf_core_copy_regs()
/openbmc/qemu/target/mips/tcg/
H A Dtranslate.c5709 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Cause)); in gen_mfc0()
7188 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Cause)); in gen_dmfc0()