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Searched refs:CORE2SEQ_INT_REQ (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/ddr/altera/
H A Dsdram_arria10.c41 #define CORE2SEQ_INT_REQ 0xF macro
135 writel(CORE2SEQ_INT_REQ, DDR_REG_CORE2SEQ); in emif_reset()