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Searched refs:CONFIG_SYS_FSL_DRAM_BASE1 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dcpu.h20 #define CONFIG_SYS_FSL_DRAM_BASE1 0x80000000 macro
71 #define CONFIG_SYS_FSL_DRAM_BASE1 0x80000000 macro
/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dcpu.c101 { CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
160 { CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
190 { CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
319 { CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
496 case CONFIG_SYS_FSL_DRAM_BASE1: in final_mmu_setup()
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt2711 CONFIG_SYS_FSL_DRAM_BASE1