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Searched refs:CONFIG_SYS_FSL_DDR3_ADDR (Results 1 – 9 of 9) sorted by relevance

/openbmc/u-boot/drivers/ddr/fsl/
H A Dutil.c41 #if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2) in fsl_ddr_get_version()
43 ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR; in fsl_ddr_get_version()
199 ddr = (void __iomem *)CONFIG_SYS_FSL_DDR3_ADDR; in print_ddr_info()
357 #if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2) in fsl_ddr_sync_memctl_refresh()
359 ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR; in fsl_ddr_sync_memctl_refresh()
H A Darm_ddr_gen3.c48 #if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2) in fsl_ddr_set_memctl_regs()
50 ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR; in fsl_ddr_set_memctl_regs()
H A Dmpc85xx_ddr_gen3.c51 #if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2) in fsl_ddr_set_memctl_regs()
53 ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR; in fsl_ddr_set_memctl_regs()
H A Dfsl_ddr_gen4.c82 #if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2) in fsl_ddr_set_memctl_regs()
84 ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR; in fsl_ddr_set_memctl_regs()
H A Dctrl_regs.c2381 #if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2) in compute_fsl_memctl_config_regs()
2383 ddrc = (void *)CONFIG_SYS_FSL_DDR3_ADDR; in compute_fsl_memctl_config_regs()
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dcpu.c533 #if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2) in dump_spd_ddr_reg()
535 ddr[i] = (void *)CONFIG_SYS_FSL_DDR3_ADDR; in dump_spd_ddr_reg()
/openbmc/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dimmap_lsch3.h15 #define CONFIG_SYS_FSL_DDR3_ADDR 0x08210000 macro
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dimmap_85xx.h2967 #define CONFIG_SYS_FSL_DDR3_ADDR \ macro
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt2705 CONFIG_SYS_FSL_DDR3_ADDR