CONFIG_SYS_DDR_TIMING_2_800 (reference) in projects: openbmc

Searched refs:CONFIG_SYS_DDR_TIMING_2_800 (Results 1 – 10 of 10) sorted by relevance

/openbmc/u-boot/board/freescale/corenet_ds/
H A D	p4080ds_ddr.c	`39 #define CONFIG_SYS_DDR_TIMING_2_800 0x0fa888cc macro 90 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_800, 122 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_800,`
/openbmc/u-boot/board/freescale/bsc9131rdb/
H A D	spl_minimal.c	`34 __raw_writel(CONFIG_SYS_DDR_TIMING_2_800, &ddr->timing_cfg_2); in sdram_init()`
H A D	ddr.c	`25 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_800,`
/openbmc/u-boot/board/freescale/bsc9132qds/
H A D	spl_minimal.c	`31 __raw_writel(CONFIG_SYS_DDR_TIMING_2_800, &ddr->timing_cfg_2); in sdram_init()`
H A D	ddr.c	`24 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_800,`
/openbmc/u-boot/include/configs/
H A D	BSC9131RDB.h	`104 #define CONFIG_SYS_DDR_TIMING_2_800 0x0fa888cf macro`
H A D	BSC9132QDS.h	`146 #define CONFIG_SYS_DDR_TIMING_2_800 0x0FA8C8CF macro`
H A D	P1010RDB.h	`245 #define CONFIG_SYS_DDR_TIMING_2_800 0x0FA888CF macro`
/openbmc/u-boot/board/freescale/p1010rdb/
H A D	ddr.c	`27 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_800,`
/openbmc/u-boot/scripts/
H A D	config_whitelist.txt	`2406 CONFIG_SYS_DDR_TIMING_2_800`