Home
last modified time | relevance | path

Searched refs:CONFIG_SYS_DDR_MODE_CONTROL (Results 1 – 14 of 14) sorted by relevance

/openbmc/u-boot/board/freescale/corenet_ds/
H A Dp4080ds_ddr.c68 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 macro
95 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
127 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
159 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
191 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
223 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
255 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
287 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
319 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
/openbmc/u-boot/board/freescale/bsc9132qds/
H A Dddr.c29 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
56 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
/openbmc/u-boot/board/freescale/p1010rdb/
H A Dddr.c32 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
59 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
/openbmc/u-boot/board/freescale/p1_twr/
H A Dddr.c38 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, in fixed_sdram()
/openbmc/u-boot/board/Arcturus/ucp1020/
H A Dddr.c98 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, in fixed_sdram()
/openbmc/u-boot/board/freescale/bsc9131rdb/
H A Dddr.c30 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
/openbmc/u-boot/include/configs/
H A DBSC9131RDB.h90 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 macro
H A Dp1_twr.h88 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 macro
H A DUCP1020.h156 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 macro
H A DBSC9132QDS.h126 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 macro
H A DP1010RDB.h232 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 macro
H A Dp1_p2_rdb_pc.h295 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 macro
/openbmc/u-boot/board/freescale/p1_p2_rdb_pc/
H A Dddr.c230 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, in fixed_sdram()
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt2367 CONFIG_SYS_DDR_MODE_CONTROL