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Searched refs:CONFIG_SYS_DDR_INTERVAL_800 (Results 1 – 10 of 10) sorted by relevance

/openbmc/u-boot/board/freescale/corenet_ds/
H A Dp4080ds_ddr.c42 #define CONFIG_SYS_DDR_INTERVAL_800 0x0c300100 macro
96 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_800,
128 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_800,
/openbmc/u-boot/board/freescale/bsc9131rdb/
H A Dspl_minimal.c40 __raw_writel(CONFIG_SYS_DDR_INTERVAL_800, &ddr->sdram_interval); in sdram_init()
H A Dddr.c31 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_800,
/openbmc/u-boot/board/freescale/bsc9132qds/
H A Dspl_minimal.c34 __raw_writel(CONFIG_SYS_DDR_INTERVAL_800, &ddr->sdram_interval); in sdram_init()
H A Dddr.c30 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_800,
/openbmc/u-boot/include/configs/
H A DBSC9131RDB.h108 #define CONFIG_SYS_DDR_INTERVAL_800 0x0c300100 macro
H A DBSC9132QDS.h150 #define CONFIG_SYS_DDR_INTERVAL_800 0x0C300000 macro
H A DP1010RDB.h249 #define CONFIG_SYS_DDR_INTERVAL_800 0x0C300100 macro
/openbmc/u-boot/board/freescale/p1010rdb/
H A Dddr.c33 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_800,
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt2349 CONFIG_SYS_DDR_INTERVAL_800