| /openbmc/u-boot/board/sbc8548/ |
| H A D | ddr.c | 124 out_be32(&ddr->sdram_cfg, CONFIG_SYS_DDR_CONTROL | 0x20000000); in fixed_sdram()
126 out_be32(&ddr->sdram_cfg, CONFIG_SYS_DDR_CONTROL); in fixed_sdram()
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| /openbmc/u-boot/include/configs/ |
| H A D | BSC9132QDS.h | 168 #define CONFIG_SYS_DDR_CONTROL CONFIG_SYS_DDR_CONTROL_800 macro
174 #define CONFIG_SYS_DDR_CONTROL CONFIG_SYS_DDR_CONTROL_1333 macro
180 #define CONFIG_SYS_DDR_CONTROL CONFIG_SYS_DDR_CONTROL_800 macro
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| H A D | UCP1020.h | 164 #define CONFIG_SYS_DDR_CONTROL 0xE70C0000 /* Type = DDR3 & ECC */ macro
166 #define CONFIG_SYS_DDR_CONTROL 0xC70C0000 /* Type = DDR3 */ macro
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| H A D | MPC8540ADS.h | 88 #define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ macro
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| H A D | BSC9131RDB.h | 96 #define CONFIG_SYS_DDR_CONTROL 0xC70C0000 /* Type = DDR3 */ macro
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| H A D | MPC8560ADS.h | 87 #define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ macro
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| H A D | sbc8548.h | 121 #define CONFIG_SYS_DDR_CONTROL 0xc300c000 macro
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| H A D | p1_twr.h | 95 #define CONFIG_SYS_DDR_CONTROL 0xc70c0000 /* Type = DDR3 */ macro
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| H A D | MPC8569MDS.h | 110 #define CONFIG_SYS_DDR_CONTROL 0xc7000000 /* Type = DDR3 */ macro
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| H A D | MPC8610HPCD.h | 108 #define CONFIG_SYS_DDR_CONTROL 0xe3008000 /* Type = DDR2 */
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| H A D | P1022DS.h | 160 #define CONFIG_SYS_DDR_CONTROL 0xc7000008 macro
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| H A D | sbc8349.h | 99 #define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ macro
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| H A D | MPC8536DS.h | 117 #define CONFIG_SYS_DDR_CONTROL 0xC3008000 /* Type = DDR2 */ macro
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| H A D | MPC8572DS.h | 109 #define CONFIG_SYS_DDR_CONTROL 0xc3000008 /* Type = DDR2 */ macro
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| /openbmc/u-boot/board/freescale/mpc8641hpcn/ |
| H A D | mpc8641hpcn.c | 95 ddr->sdram_cfg = (CONFIG_SYS_DDR_CONTROL | 0x20000000); in fixed_sdram()
97 ddr->sdram_cfg = CONFIG_SYS_DDR_CONTROL; in fixed_sdram()
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| /openbmc/u-boot/board/freescale/bsc9132qds/ |
| H A D | ddr.c | 25 .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL,
52 .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL,
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| /openbmc/u-boot/board/freescale/p1010rdb/ |
| H A D | ddr.c | 28 .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL,
55 .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL,
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| /openbmc/u-boot/board/freescale/p1_twr/ |
| H A D | ddr.c | 34 .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL, in fixed_sdram()
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| /openbmc/u-boot/board/freescale/bsc9131rdb/ |
| H A D | spl_minimal.c | 50 __raw_writel(CONFIG_SYS_DDR_CONTROL & ~SDRAM_CFG_MEM_EN, &ddr->sdram_cfg); in sdram_init()
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| H A D | ddr.c | 26 .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL,
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| /openbmc/u-boot/board/Arcturus/ucp1020/ |
| H A D | ddr.c | 94 .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL, in fixed_sdram()
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| /openbmc/u-boot/board/freescale/mpc8572ds/ |
| H A D | mpc8572ds.c | 90 ddr->sdram_cfg = CONFIG_SYS_DDR_CONTROL; in fixed_sdram()
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| /openbmc/u-boot/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 226 .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL, in fixed_sdram()
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| /openbmc/u-boot/board/freescale/mpc8536ds/ |
| H A D | mpc8536ds.c | 118 ddr->sdram_cfg = CONFIG_SYS_DDR_CONTROL; in fixed_sdram()
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| /openbmc/u-boot/board/freescale/mpc8569mds/ |
| H A D | mpc8569mds.c | 263 out_be32(&ddr->sdram_cfg, CONFIG_SYS_DDR_CONTROL); in fixed_sdram()
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