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Searched refs:CONFIG_SYS_BR2_PRELIM (Results 1 – 25 of 49) sorted by relevance

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/openbmc/u-boot/include/configs/
H A Dtuxx1.h76 #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \ macro
97 #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \ macro
H A Dkmp204x.h46 #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_LBAPP1_BR_PRELIM macro
H A DM5272C3.h177 #define CONFIG_SYS_BR2_PRELIM 0x30000001 macro
H A Dcobra5272.h292 #define CONFIG_SYS_BR2_PRELIM 0 macro
H A Dcorenet_ds.h237 #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ macro
242 #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ macro
H A DMPC8555CDS.h140 #define CONFIG_SYS_BR2_PRELIM 0xf0001861 macro
H A Dsuvd3.h87 #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \ macro
H A DMPC8541CDS.h142 #define CONFIG_SYS_BR2_PRELIM 0xf0001861 macro
H A DMPC8540ADS.h142 #define CONFIG_SYS_BR2_PRELIM 0xf0001861 macro
H A Dsocrates.h147 #define CONFIG_SYS_BR2_PRELIM 0xc80018a1 /* UPMB, 32-bit */ macro
H A DMPC8568MDS.h132 #define CONFIG_SYS_BR2_PRELIM 0xf0001861 macro
H A DMPC8560ADS.h141 #define CONFIG_SYS_BR2_PRELIM 0xf0001861 macro
H A DMPC8544DS.h125 #define CONFIG_SYS_BR2_PRELIM 0xf8201001 /* port size 16bit */ macro
H A Dxpedite520x.h123 #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_NAND_BASE | \ macro
H A DMPC8548CDS.h204 #define CONFIG_SYS_BR2_PRELIM \ macro
H A Dp1_twr.h146 #define CONFIG_SYS_BR2_PRELIM CONFIG_SSD_BR_PRELIM macro
/openbmc/u-boot/arch/powerpc/cpu/mpc8xxx/
H A Dfsl_lbc.c71 #if defined(CONFIG_SYS_BR2_PRELIM) && defined(CONFIG_SYS_OR2_PRELIM) in init_early_memctl_regs()
73 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM); in init_early_memctl_regs()
/openbmc/u-boot/arch/powerpc/cpu/mpc8xx/
H A Dcpu_init.c146 #if defined(CONFIG_SYS_OR2_PRELIM) && defined(CONFIG_SYS_BR2_PRELIM) in cpu_init_f()
148 out_be32(&memctl->memc_br2, CONFIG_SYS_BR2_PRELIM); in cpu_init_f()
/openbmc/u-boot/board/freescale/mpc8555cds/
H A Dmpc8555cds.c277 #if defined(CONFIG_SYS_OR2_PRELIM) && defined(CONFIG_SYS_BR2_PRELIM) in lbc_sdram_init()
293 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM); in lbc_sdram_init()
/openbmc/u-boot/board/freescale/mpc8541cds/
H A Dmpc8541cds.c279 #if defined(CONFIG_SYS_OR2_PRELIM) && defined(CONFIG_SYS_BR2_PRELIM) in lbc_sdram_init()
295 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM); in lbc_sdram_init()
/openbmc/u-boot/board/freescale/mpc8568mds/
H A Dmpc8568mds.c157 #if defined(CONFIG_SYS_OR2_PRELIM) && defined(CONFIG_SYS_BR2_PRELIM) in lbc_sdram_init()
172 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM); in lbc_sdram_init()
/openbmc/u-boot/board/freescale/p1022ds/
H A Dspl_minimal.c30 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM); in board_init_f()
/openbmc/u-boot/board/freescale/mpc8548cds/
H A Dmpc8548cds.c97 #if defined(CONFIG_SYS_OR2_PRELIM) && defined(CONFIG_SYS_BR2_PRELIM) in lbc_sdram_init()
112 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM); in lbc_sdram_init()
/openbmc/u-boot/configs/
H A DMCR3000_defconfig22 CONFIG_SYS_BR2_PRELIM=0x08000801
/openbmc/u-boot/board/sbc8349/
H A Dsbc8349.c137 #if defined(CONFIG_SYS_BR2_PRELIM) \

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