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Searched refs:CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET (Results 1 – 11 of 11) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc8xxx/
H A Dsrio.c420 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET, in srio_boot_master_release_slave()
436 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET, in srio_boot_master_release_slave()
/openbmc/u-boot/drivers/pci/
H A Dfsl_pci_init.c262 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; in fsl_pcie_boot_master_release_slave()
267 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; in fsl_pcie_boot_master_release_slave()
273 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; in fsl_pcie_boot_master_release_slave()
/openbmc/u-boot/include/configs/
H A DP2041RDB.h334 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
H A Dcorenet_ds.h342 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
H A DT4240QDS.h347 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
H A DT208xRDB.h419 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
H A DB4860QDS.h490 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
H A DT102xQDS.h116 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
H A DT208xQDS.h477 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
H A DT102xRDB.h131 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt1907 CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET