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Searched refs:CMCOR (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/sh/include/asm/
H A Dcpu_sh7723.h92 #define CMCOR 0xA44A0068 macro
H A Dcpu_sh7724.h113 #define CMCOR 0xA44A0068 macro
H A Dcpu_sh7722.h261 #define CMCOR 0xA44A0068 macro
/openbmc/linux/drivers/clocksource/
H A Dsh_cmt.c237 #define CMCOR 2 /* channel register */ macro
305 u32 old_value = ch->cmt->info->read_count(ch->ioctrl, CMCOR); in sh_cmt_write_cmcor()
308 ch->cmt->info->write_count(ch->ioctrl, CMCOR, value); in sh_cmt_write_cmcor()
/openbmc/qemu/hw/timer/
H A Drenesas_cmt.c52 REG16(CMCOR, 4)