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Searched refs:CLK_UART1_DIV (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dpistachio-clk.h69 #define CLK_UART1_DIV 79 macro
/openbmc/linux/drivers/clk/pistachio/
H A Dclk-pistachio.c80 DIV_F(CLK_UART1_DIV, "uart1_div", "uart1_internal_div", 0x240, 10,
/openbmc/linux/arch/mips/boot/dts/img/
H A Dpistachio.dtsi275 <&clk_core CLK_UART1_DIV>;