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Searched refs:CLK_TOP_SPM_SEL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt6765-clk.h154 #define CLK_TOP_SPM_SEL 119 macro
H A Dmediatek,mt8365-clk.h97 #define CLK_TOP_SPM_SEL 87 macro
H A Dmt8192-clk.h13 #define CLK_TOP_SPM_SEL 1 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8365.c484 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SPM_SEL, "spm_sel", spm_parents,
H A Dclk-mt8192.c551 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SPM_SEL, "spm_sel",
H A Dclk-mt6765.c444 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPM_SEL, "spm_sel", spm_parents, CLK_CFG_5,