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Searched refs:CLK_TOP_PCIE1_MCU_SEL (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt7629-clk.h113 #define CLK_TOP_PCIE1_MCU_SEL 103 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7629-clk.h117 #define CLK_TOP_PCIE1_MCU_SEL 103 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7629.c529 MUX_GATE(CLK_TOP_PCIE1_MCU_SEL, "pcie1_mcu_sel", scp_parents,
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7629.c409 MUX_GATE(CLK_TOP_PCIE1_MCU_SEL, scp_parents, 0xB0, 16, 2, 23),