Searched refs:CLK_TOP_PCIE0_MCU_SEL (Results 1 – 4 of 4) sorted by relevance
112 #define CLK_TOP_PCIE0_MCU_SEL 102 macro
116 #define CLK_TOP_PCIE0_MCU_SEL 102 macro
527 MUX_GATE(CLK_TOP_PCIE0_MCU_SEL, "pcie0_mcu_sel", scp_parents,
408 MUX_GATE(CLK_TOP_PCIE0_MCU_SEL, scp_parents, 0xB0, 8, 2, 15),