| /openbmc/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7623.c | 140 FACTOR0(CLK_TOP_MSDCPLL_D2, CLK_APMIXED_MSDCPLL, 1, 2),
233 CLK_TOP_MSDCPLL_D2,
254 CLK_TOP_MSDCPLL_D2,
279 CLK_TOP_MSDCPLL_D2,
|
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mt6797-clk.h | 102 #define CLK_TOP_MSDCPLL_D2 92 macro
|
| H A D | mediatek,mt6795-clk.h | 46 #define CLK_TOP_MSDCPLL_D2 35 macro
|
| H A D | mt6765-clk.h | 75 #define CLK_TOP_MSDCPLL_D2 40 macro
|
| H A D | mt8173-clk.h | 48 #define CLK_TOP_MSDCPLL_D2 38 macro
|
| H A D | mediatek,mt8365-clk.h | 64 #define CLK_TOP_MSDCPLL_D2 54 macro
|
| H A D | mt2712-clk.h | 111 #define CLK_TOP_MSDCPLL_D2 80 macro
|
| H A D | mt6779-clk.h | 97 #define CLK_TOP_MSDCPLL_D2 87 macro
|
| H A D | mt8183-clk.h | 122 #define CLK_TOP_MSDCPLL_D2 86 macro
|
| H A D | mt8186-clk.h | 130 #define CLK_TOP_MSDCPLL_D2 111 macro
|
| H A D | mt2701-clk.h | 48 #define CLK_TOP_MSDCPLL_D2 38 macro
|
| H A D | mt8192-clk.h | 137 #define CLK_TOP_MSDCPLL_D2 125 macro
|
| H A D | mediatek,mt8188-clk.h | 168 #define CLK_TOP_MSDCPLL_D2 157 macro
|
| H A D | mt8195-clk.h | 203 #define CLK_TOP_MSDCPLL_D2 191 macro
|
| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | mt7623-clk.h | 65 #define CLK_TOP_MSDCPLL_D2 52 macro
|
| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt6795-topckgen.c | 399 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
|
| H A D | clk-mt8186-topckgen.c | 65 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
|
| H A D | clk-mt8173-topckgen.c | 478 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
|
| H A D | clk-mt6797.c | 82 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll_ck", 1, 2),
|
| H A D | clk-mt8188-topckgen.c | 90 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
|
| H A D | clk-mt8183.c | 95 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
|
| H A D | clk-mt2712.c | 118 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll_ck", 1, 2),
|
| H A D | clk-mt8365.c | 85 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
|
| H A D | clk-mt8192.c | 83 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
|
| /openbmc/linux/Documentation/devicetree/bindings/mmc/ |
| H A D | mtk-sd.yaml | 325 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
|