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Searched refs:CLK_TOP_MMPLL (Results 1 – 15 of 15) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmediatek,mt6795-clk.h43 #define CLK_TOP_MMPLL 32 macro
H A Dmt6765-clk.h68 #define CLK_TOP_MMPLL 33 macro
H A Dmt8173-clk.h45 #define CLK_TOP_MMPLL 35 macro
H A Dmediatek,mt8365-clk.h43 #define CLK_TOP_MMPLL 33 macro
H A Dmt2712-clk.h97 #define CLK_TOP_MMPLL 66 macro
H A Dmt2701-clk.h51 #define CLK_TOP_MMPLL 41 macro
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c144 FACTOR0(CLK_TOP_MMPLL, CLK_APMIXED_MMPLL, 1, 1),
239 CLK_TOP_MMPLL,
419 CLK_TOP_MMPLL,
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h68 #define CLK_TOP_MMPLL 55 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt6795-topckgen.c395 FACTOR(CLK_TOP_MMPLL, "mmpll_ck", "mmpll", 1, 1),
H A Dclk-mt8173-topckgen.c474 FACTOR(CLK_TOP_MMPLL, "mmpll_ck", "mmpll", 1, 1),
H A Dclk-mt2712.c104 FACTOR(CLK_TOP_MMPLL, "mmpll_ck", "mmpll", 1, 1),
H A Dclk-mt8365.c62 FACTOR(CLK_TOP_MMPLL, "mmpll_ck", "mmpll", 1, 1),
H A Dclk-mt6765.c118 FACTOR(CLK_TOP_MMPLL, "mmpll_ck", "mmpll", 1, 1),
H A Dclk-mt2701.c101 FACTOR(CLK_TOP_MMPLL, "mmpll_ck", "mmpll", 1, 1),
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623n.dtsi44 clocks = <&topckgen CLK_TOP_MMPLL>,