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Searched refs:CLK_TOP_APLL_I2S0_SEL (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h115 #define CLK_TOP_APLL_I2S0_SEL 105 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8365.c396 MUX(CLK_TOP_APLL_I2S0_SEL, "apll_i2s0_sel", apll_i2s_parents, 0x0320, 11, 1),