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Searched refs:CLK_TOP_AP2WBMCU_SEL (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt7629-clk.h97 #define CLK_TOP_AP2WBMCU_SEL 87 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7629-clk.h101 #define CLK_TOP_AP2WBMCU_SEL 87 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7629.c493 MUX_GATE(CLK_TOP_AP2WBMCU_SEL, "ap2wbmcu_sel", ap2wbmcu_parents,
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7629.c384 MUX_GATE(CLK_TOP_AP2WBMCU_SEL, ap2wbmcu_parents, 0x70, 16, 3, 23),