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Searched refs:CLK_TOP_A1SYS_SEL (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt7986-clk.h72 #define CLK_TOP_A1SYS_SEL 49 macro
H A Dmediatek,mt7981-clk.h115 #define CLK_TOP_A1SYS_SEL 102 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7986-topckgen.c246 MUX_GATE_CLR_SET_UPD(CLK_TOP_A1SYS_SEL, "a1sys_sel", a1sys_parents,
H A Dclk-mt7981-topckgen.c371 MUX_GATE_CLR_SET_UPD(CLK_TOP_A1SYS_SEL, "a1sys_sel", a1sys_parents,
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dmediatek,mt7986-afe.yaml152 assigned-clocks = <&topckgen CLK_TOP_A1SYS_SEL>,