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Searched refs:CLK_SET_RATE_UNGATE (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/drivers/clk/sunxi-ng/
H A Dccu-sun50i-a64.c38 CLK_SET_RATE_UNGATE),
69 CLK_SET_RATE_UNGATE);
83 CLK_SET_RATE_UNGATE);
95 CLK_SET_RATE_UNGATE);
104 CLK_SET_RATE_UNGATE);
116 &ccu_nk_ops, CLK_SET_RATE_UNGATE),
146 CLK_SET_RATE_UNGATE);
158 CLK_SET_RATE_UNGATE);
200 CLK_SET_RATE_UNGATE);
212 CLK_SET_RATE_UNGATE);
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H A Dccu-sun8i-a83t.c46 CLK_SET_RATE_UNGATE),
60 CLK_SET_RATE_UNGATE),
93 &ccu_nm_ops, CLK_SET_RATE_UNGATE),
111 CLK_SET_RATE_UNGATE),
127 CLK_SET_RATE_UNGATE),
143 CLK_SET_RATE_UNGATE),
159 CLK_SET_RATE_UNGATE),
175 CLK_SET_RATE_UNGATE),
191 CLK_SET_RATE_UNGATE),
207 CLK_SET_RATE_UNGATE),
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H A Dccu-sun8i-a33.c70 CLK_SET_RATE_UNGATE);
82 CLK_SET_RATE_UNGATE);
94 CLK_SET_RATE_UNGATE);
112 CLK_SET_RATE_UNGATE);
124 CLK_SET_RATE_UNGATE);
141 CLK_SET_RATE_UNGATE);
153 CLK_SET_RATE_UNGATE);
165 CLK_SET_RATE_UNGATE);
175 CLK_SET_RATE_UNGATE),
H A Dccu-sun8i-a23.c72 CLK_SET_RATE_UNGATE);
84 CLK_SET_RATE_UNGATE);
96 CLK_SET_RATE_UNGATE);
114 CLK_SET_RATE_UNGATE);
126 CLK_SET_RATE_UNGATE);
143 CLK_SET_RATE_UNGATE);
155 CLK_SET_RATE_UNGATE);
167 CLK_SET_RATE_UNGATE);
H A Dccu-sun50i-h616.c46 CLK_SET_RATE_UNGATE),
62 CLK_SET_RATE_UNGATE),
77 CLK_SET_RATE_UNGATE),
94 CLK_SET_RATE_UNGATE),
111 CLK_SET_RATE_UNGATE),
126 CLK_SET_RATE_UNGATE),
148 CLK_SET_RATE_UNGATE),
166 CLK_SET_RATE_UNGATE),
184 CLK_SET_RATE_UNGATE),
199 CLK_SET_RATE_UNGATE),
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H A Dccu-sun9i-a80.c45 CLK_SET_RATE_UNGATE),
59 CLK_SET_RATE_UNGATE),
97 CLK_SET_RATE_UNGATE),
113 CLK_SET_RATE_UNGATE),
129 CLK_SET_RATE_UNGATE),
144 CLK_SET_RATE_UNGATE),
160 CLK_SET_RATE_UNGATE),
176 CLK_SET_RATE_UNGATE),
192 CLK_SET_RATE_UNGATE),
208 CLK_SET_RATE_UNGATE),
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H A Dccu-sun50i-a100.c52 CLK_SET_RATE_UNGATE),
68 CLK_SET_RATE_UNGATE |
86 CLK_SET_RATE_UNGATE),
103 CLK_SET_RATE_UNGATE),
119 CLK_SET_RATE_UNGATE),
139 CLK_SET_RATE_UNGATE),
155 CLK_SET_RATE_UNGATE),
171 CLK_SET_RATE_UNGATE),
186 CLK_SET_RATE_UNGATE),
212 CLK_SET_RATE_UNGATE),
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H A Dccu-sun8i-r40.c40 CLK_SET_RATE_UNGATE),
71 CLK_SET_RATE_UNGATE);
85 CLK_SET_RATE_UNGATE);
98 CLK_SET_RATE_UNGATE);
108 CLK_SET_RATE_UNGATE);
122 CLK_SET_RATE_UNGATE),
156 CLK_SET_RATE_UNGATE),
172 CLK_SET_RATE_UNGATE);
209 CLK_SET_RATE_UNGATE);
251 CLK_SET_RATE_UNGATE);
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H A Dccu-sun50i-h6.c44 CLK_SET_RATE_UNGATE),
60 CLK_SET_RATE_UNGATE),
77 CLK_SET_RATE_UNGATE),
94 CLK_SET_RATE_UNGATE),
109 CLK_SET_RATE_UNGATE),
131 CLK_SET_RATE_UNGATE),
149 CLK_SET_RATE_UNGATE),
164 CLK_SET_RATE_UNGATE),
179 CLK_SET_RATE_UNGATE),
194 CLK_SET_RATE_UNGATE),
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H A Dccu-sun6i-a31.c68 CLK_SET_RATE_UNGATE);
80 CLK_SET_RATE_UNGATE);
92 CLK_SET_RATE_UNGATE);
101 CLK_SET_RATE_UNGATE);
110 CLK_SET_RATE_UNGATE);
122 CLK_SET_RATE_UNGATE);
134 CLK_SET_RATE_UNGATE);
154 CLK_SET_RATE_UNGATE);
166 CLK_SET_RATE_UNGATE);
178 CLK_SET_RATE_UNGATE);
H A Dccu-sun8i-h3.c36 CLK_SET_RATE_UNGATE);
65 CLK_SET_RATE_UNGATE);
79 CLK_SET_RATE_UNGATE);
91 CLK_SET_RATE_UNGATE);
100 CLK_SET_RATE_UNGATE);
109 CLK_SET_RATE_UNGATE);
121 CLK_SET_RATE_UNGATE);
130 CLK_SET_RATE_UNGATE);
142 CLK_SET_RATE_UNGATE);
H A Dccu-suniv-f1c100s.c41 CLK_SET_RATE_UNGATE),
61 CLK_SET_RATE_UNGATE);
73 CLK_SET_RATE_UNGATE);
85 CLK_SET_RATE_UNGATE);
H A Dccu-sun20i-d1.c45 CLK_SET_RATE_UNGATE),
61 CLK_SET_RATE_UNGATE),
75 CLK_SET_RATE_UNGATE),
113 CLK_SET_RATE_UNGATE),
137 CLK_SET_RATE_UNGATE),
160 CLK_SET_RATE_UNGATE),
189 CLK_SET_RATE_UNGATE),
217 CLK_SET_RATE_UNGATE),
H A Dccu-sun8i-v3s.c67 CLK_SET_RATE_UNGATE);
/openbmc/linux/drivers/clocksource/
H A Dingenic-sysost.c197 .flags = CLK_SET_RATE_UNGATE,
208 .flags = CLK_SET_RATE_UNGATE,
/openbmc/linux/drivers/clk/ingenic/
H A Dtcu.c246 .flags = CLK_SET_RATE_UNGATE, \
/openbmc/linux/drivers/clk/rockchip/
H A Dclk.c257 flags | CLK_SET_RATE_UNGATE); in rockchip_clk_register_frac_branch()
/openbmc/linux/drivers/clk/
H A Dclk.c2411 if (core->flags & CLK_SET_RATE_UNGATE) { in clk_change_rate()
2445 if (core->flags & CLK_SET_RATE_UNGATE) { in clk_change_rate()
3502 ENTRY(CLK_SET_RATE_UNGATE),
/openbmc/linux/include/linux/
H A Dclk-provider.h29 #define CLK_SET_RATE_UNGATE BIT(10) /* clock needs to run to set rate */ macro