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Searched refs:CLK_PLL_DDR_BASE (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/clk/sunxi-ng/
H A Dccu-sun5i.h26 #define CLK_PLL_DDR_BASE 11 macro
H A Dccu-sun4i-a10.h25 #define CLK_PLL_DDR_BASE 11 macro
H A Dccu-sun5i.c642 [CLK_PLL_DDR_BASE] = &pll_ddr_base_clk.common.hw,
781 [CLK_PLL_DDR_BASE] = &pll_ddr_base_clk.common.hw,
887 [CLK_PLL_DDR_BASE] = &pll_ddr_base_clk.common.hw,
H A Dccu-sun4i-a10.c1071 [CLK_PLL_DDR_BASE] = &pll_ddr_base_clk.common.hw,
1223 [CLK_PLL_DDR_BASE] = &pll_ddr_base_clk.common.hw,