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Searched refs:CLK_PCIE30PHY_REF_M (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Drockchip,pcie3-phy.yaml96 clocks = <&pmucru CLK_PCIE30PHY_REF_M>,
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568.dtsi54 clocks = <&pmucru CLK_PCIE30PHY_REF_M>, <&pmucru CLK_PCIE30PHY_REF_N>,
/openbmc/linux/include/dt-bindings/clock/
H A Drk3568-cru.h51 #define CLK_PCIE30PHY_REF_M 38 macro
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3568.c1567 GATE(CLK_PCIE30PHY_REF_M, "clk_pcie30phy_ref_m", "ppll_ph0", 0,