Searched refs:CLK_MCU_ARMPLL_LL_SEL (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt8186-mcu.c | 39 MUX(CLK_MCU_ARMPLL_LL_SEL, "mcu_armpll_ll_sel", mcu_armpll_ll_parents, 0x2A0, 9, 2),
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mt8186-clk.h | 12 #define CLK_MCU_ARMPLL_LL_SEL 0 macro
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| /openbmc/linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8186.dtsi | 371 clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
395 clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
419 clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
443 clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
467 clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
491 clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
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