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Searched refs:CLK_IFR_MSDC1_HCLK (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h177 #define CLK_IFR_MSDC1_HCLK 24 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8365.c701 GATE_IFR3(CLK_IFR_MSDC1_HCLK, "ifr_msdc1", "axi_sel", 4),
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8365.dtsi552 <&infracfg CLK_IFR_MSDC1_HCLK>,