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Searched refs:CLK_IFR_AP_DMA (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8365.dtsi389 clocks = <&infracfg CLK_IFR_AP_DMA>;
445 clocks = <&infracfg CLK_IFR_I2C0_AXI>, <&infracfg CLK_IFR_AP_DMA>;
457 clocks = <&infracfg CLK_IFR_I2C1_AXI>, <&infracfg CLK_IFR_AP_DMA>;
469 clocks = <&infracfg CLK_IFR_I2C2_AXI>, <&infracfg CLK_IFR_AP_DMA>;
494 clocks = <&infracfg CLK_IFR_I2C3_AXI>, <&infracfg CLK_IFR_AP_DMA>;
/openbmc/linux/include/dt-bindings/clock/
H A Dmt6765-clk.h191 #define CLK_IFR_AP_DMA 27 macro
H A Dmediatek,mt8365-clk.h184 #define CLK_IFR_AP_DMA 31 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8365.c708 GATE_IFR3(CLK_IFR_AP_DMA, "ifr_ap_dma", "axi_sel", 18),
H A Dclk-mt6765.c590 GATE_IFR3(CLK_IFR_AP_DMA, "ifr_ap_dma", "axi_ck", 18),