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Searched refs:CLK_ETHSYS_ESW (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt2701-eth.c25 GATE_ETH(CLK_ETHSYS_ESW, "esw_clk", "ethpll_500m_ck", 6),
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h400 #define CLK_ETHSYS_ESW 1 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dmt2701-clk.h417 #define CLK_ETHSYS_ESW 2 macro
/openbmc/u-boot/arch/arm/dts/
H A Dmt7623.dtsi262 <&ethsys CLK_ETHSYS_ESW>,
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c715 GATE_ETH1(CLK_ETHSYS_ESW, CLK_TOP_ETHPLL_500M, 6),
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt2701.dtsi734 <&ethsys CLK_ETHSYS_ESW>,
H A Dmt7623.dtsi968 <&ethsys CLK_ETHSYS_ESW>,