11802d0beSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2e9862118SShunli Wang /* 3e9862118SShunli Wang * Copyright (c) 2014 MediaTek Inc. 4e9862118SShunli Wang * Author: Shunli Wang <shunli.wang@mediatek.com> 5e9862118SShunli Wang */ 6e9862118SShunli Wang 7e9862118SShunli Wang #include <linux/clk-provider.h> 8e9862118SShunli Wang #include <linux/platform_device.h> 9e9862118SShunli Wang 10e9862118SShunli Wang #include "clk-mtk.h" 11e9862118SShunli Wang #include "clk-gate.h" 12e9862118SShunli Wang 13e9862118SShunli Wang #include <dt-bindings/clock/mt2701-clk.h> 14e9862118SShunli Wang 15e9862118SShunli Wang static const struct mtk_gate_regs eth_cg_regs = { 16e9862118SShunli Wang .sta_ofs = 0x0030, 17e9862118SShunli Wang }; 18e9862118SShunli Wang 194c85e20bSAngeloGioacchino Del Regno #define GATE_ETH(_id, _name, _parent, _shift) \ 204c85e20bSAngeloGioacchino Del Regno GATE_MTK(_id, _name, _parent, ð_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv) 21e9862118SShunli Wang 22e9862118SShunli Wang static const struct mtk_gate eth_clks[] = { 230f69a423SAngeloGioacchino Del Regno GATE_DUMMY(CLK_DUMMY, "eth_dummy"), 24e9862118SShunli Wang GATE_ETH(CLK_ETHSYS_HSDMA, "hsdma_clk", "ethif_sel", 5), 25e9862118SShunli Wang GATE_ETH(CLK_ETHSYS_ESW, "esw_clk", "ethpll_500m_ck", 6), 26e9862118SShunli Wang GATE_ETH(CLK_ETHSYS_GP2, "gp2_clk", "trgpll", 7), 27e9862118SShunli Wang GATE_ETH(CLK_ETHSYS_GP1, "gp1_clk", "ethpll_500m_ck", 8), 28e9862118SShunli Wang GATE_ETH(CLK_ETHSYS_PCM, "pcm_clk", "ethif_sel", 11), 29e9862118SShunli Wang GATE_ETH(CLK_ETHSYS_GDMA, "gdma_clk", "ethif_sel", 14), 30e9862118SShunli Wang GATE_ETH(CLK_ETHSYS_I2S, "i2s_clk", "ethif_sel", 17), 31e9862118SShunli Wang GATE_ETH(CLK_ETHSYS_CRYPTO, "crypto_clk", "ethif_sel", 29), 32e9862118SShunli Wang }; 33e9862118SShunli Wang 34723e3671SRex-BC Chen static u16 rst_ofs[] = { 0x34, }; 35723e3671SRex-BC Chen 362d2a2900SRex-BC Chen static const struct mtk_clk_rst_desc clk_rst_desc = { 372d2a2900SRex-BC Chen .version = MTK_RST_SIMPLE, 38723e3671SRex-BC Chen .rst_bank_ofs = rst_ofs, 39723e3671SRex-BC Chen .rst_bank_nr = ARRAY_SIZE(rst_ofs), 402d2a2900SRex-BC Chen }; 412d2a2900SRex-BC Chen 420f69a423SAngeloGioacchino Del Regno static const struct mtk_clk_desc eth_desc = { 430f69a423SAngeloGioacchino Del Regno .clks = eth_clks, 440f69a423SAngeloGioacchino Del Regno .num_clks = ARRAY_SIZE(eth_clks), 450f69a423SAngeloGioacchino Del Regno .rst_desc = &clk_rst_desc, 46e9862118SShunli Wang }; 47e9862118SShunli Wang 480f69a423SAngeloGioacchino Del Regno static const struct of_device_id of_match_clk_mt2701_eth[] = { 490f69a423SAngeloGioacchino Del Regno { .compatible = "mediatek,mt2701-ethsys", .data = ð_desc }, 500f69a423SAngeloGioacchino Del Regno { /* sentinel */ } 510f69a423SAngeloGioacchino Del Regno }; 5265c9ad77SAngeloGioacchino Del Regno MODULE_DEVICE_TABLE(of, of_match_clk_mt2701_eth); 53e9862118SShunli Wang 54e9862118SShunli Wang static struct platform_driver clk_mt2701_eth_drv = { 550f69a423SAngeloGioacchino Del Regno .probe = mtk_clk_simple_probe, 56*61ca6ee7SUwe Kleine-König .remove_new = mtk_clk_simple_remove, 57e9862118SShunli Wang .driver = { 58e9862118SShunli Wang .name = "clk-mt2701-eth", 59e9862118SShunli Wang .of_match_table = of_match_clk_mt2701_eth, 60e9862118SShunli Wang }, 61e9862118SShunli Wang }; 62164d240dSAngeloGioacchino Del Regno module_platform_driver(clk_mt2701_eth_drv); 63a451da86SAngeloGioacchino Del Regno MODULE_LICENSE("GPL"); 64