Searched refs:CLK_BDP_WR_B (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/clk/mediatek/ | ||
| H A D | clk-mt2701-bdp.c | 39 GATE_BDP0(CLK_BDP_WR_B, "wr_bclk", "mm_sel", 5), |
| /openbmc/linux/include/dt-bindings/clock/ | ||
| H A D | mt2701-clk.h | 437 #define CLK_BDP_WR_B 6 macro |