Searched refs:CLK_APMIXED_AUD1PLL (Results 1 – 6 of 6) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 175 #define CLK_APMIXED_AUD1PLL 5 macro
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| H A D | mt2701-clk.h | 181 #define CLK_APMIXED_AUD1PLL 7 macro
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| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt7622-apmixedsys.c | 69 PLL(CLK_APMIXED_AUD1PLL, "aud1pll", 0x0324, 0x0330, 0,
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| H A D | clk-mt2701.c | 952 PLL(CLK_APMIXED_AUD1PLL, "aud1pll", 0x270, 0x27c, 0x00000001, 0,
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| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | mt7623-clk.h | 183 #define CLK_APMIXED_AUD1PLL 6 macro
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| /openbmc/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7623.c | 56 PLL(CLK_APMIXED_AUD1PLL, 0x270, 0x27c, 0x00000001, 0,
175 FACTOR0(CLK_TOP_AUD1PLL_98M, CLK_APMIXED_AUD1PLL, 1, 3),
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