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Searched refs:CCC (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/Documentation/driver-api/i3c/
H A Dprotocol.rst121 I3C CCC commands
124 CCC (Common Command Code) commands are meant to be used for anything that is
127 CCC commands contain an 8-bit CCC ID describing the command that is executed.
132 payload is either sent by the master sending the command (write CCC command),
133 or sent by the slave receiving the command (read CCC command). Of course, read
135 Note that, when sending a CCC command to a specific device, the device address
139 from the CCC ID.
141 Note that vendors can use a dedicated range of CCC IDs for their own commands
172 using a broadcast CCC command.
/openbmc/qemu/hw/i3c/
H A Dtrace-events18 aspeed_i3c_device_transfer_ccc(uint32_t deviceid, uint8_t ccc) "I3C Dev[%u] transfer CCC 0x%" PRIx8
24 i3c_target_handle_ccc(uint8_t address, uint8_t ccc) "I3C target 0x%" PRIx8 " handling CCC 0x%" PRIx8
43 mock_target_new_ccc(uint8_t ccc) "I3C mock target handle CCC 0x%" PRIx8
50 remote_i3c_ccc_read(const char *name, uint32_t num_read, uint32_t num_to_read) "Remote I3C '%s' CCC…
/openbmc/linux/drivers/gpu/drm/armada/
H A Darmada_overlay.c354 #define CCC(v) ((v) << 24 | (v) << 16 | (v) << 8) in armada_overlay_set_property() macro
355 drm_to_overlay_state(state)->colorkey_yr = CCC(K2R(val)); in armada_overlay_set_property()
356 drm_to_overlay_state(state)->colorkey_ug = CCC(K2G(val)); in armada_overlay_set_property()
357 drm_to_overlay_state(state)->colorkey_vb = CCC(K2B(val)); in armada_overlay_set_property()
358 #undef CCC in armada_overlay_set_property()
/openbmc/openbmc/meta-openembedded/meta-networking/recipes-support/ncp/
H A Dlibowfat_0.32.bb19 CCC='${CC}' CFLAGS='${CFLAGS} -I.' CFLAGS_OPT='${CFLAGS} -I.' \
/openbmc/openbmc-tools/dbus-vis/
H A Ddbus_vis.css124 background-color: #CCC;
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/nss/
H A Dnss_3.98.bb130 # source files and CFLAGS does that. Nothing uses CCC.
133 make -C ./nss CCC="${CXX} -g" \
183 CCC="${CXX}" \
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dmicrochip,mpfs-ccc.yaml31 The CCC PLL's have two input clocks. It is required that even if the input
/openbmc/linux/drivers/net/ethernet/renesas/
H A Dravb.h49 CCC = 0x0000, enumerator
H A Dravb_main.c83 ravb_modify(ndev, CCC, ccc_mask, opmode); in ravb_set_opmode()
2578 ravb_modify(ndev, CCC, CCC_CSEL, CCC_CSEL_HPB); in ravb_set_config_mode()
/openbmc/linux/drivers/power/supply/
H A Dbq24190_charger.c377 BQ24190_SYSFS_FIELD_RW(ichg, CCC, ICHG),
378 BQ24190_SYSFS_FIELD_RW(force_20_pct, CCC, FORCE_20PCT),
/openbmc/linux/arch/arm64/kvm/
H A Demulate-nested.c413 #define CCC(id, fn) \ macro
417 CCC(CGT_CNTHCTL_EL1PCTEN, check_cnthctl_el1pcten),
418 CCC(CGT_CNTHCTL_EL1PTEN, check_cnthctl_el1pten),
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dqrb5165-rb5.dts1059 "GPIO-CCC",