/openbmc/linux/Documentation/devicetree/bindings/net/can/ |
H A D | st,stm32-bxcan.yaml | 69 SRAM memory shared by the two bxCAN cells (CAN1 primary and CAN2 92 resets = <&rcc STM32F4_APB1_RESET(CAN1)>; 93 clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
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H A D | renesas,rcar-canfd.yaml | 125 - description: CAN1 error interrupt 126 - description: CAN1 transmit interrupt 127 - description: CAN1 transmit/receive FIFO receive completion interrupt
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/openbmc/linux/arch/arm64/boot/dts/renesas/ |
H A D | r9a07g044c2-smarc.dts | 14 * SW1-3 : SW_SCIF_CAN (1: CAN1; 0: SCIF1) 15 * SW1-4 : SW_RSPI_CAN (1: CAN1; 0: RSPI1)
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H A D | r9a07g043u11-smarc.dts | 14 * SW1-3 : SW_ET0_EN_N (0: ETHER0; 1: CAN0, CAN1, SSI1, RSPI1)
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/openbmc/linux/arch/riscv/boot/dts/renesas/ |
H A D | r9a07g043f01-smarc.dts | 14 * SW1-3 : SW_ET0_EN_N (0: ETHER0; 1: CAN0, CAN1, SSI1, RSPI1)
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/openbmc/linux/include/dt-bindings/clock/ |
H A D | xlnx-zynqmp-clk.h | 78 #define CAN1 66 macro
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/openbmc/linux/drivers/net/can/sja1000/ |
H A D | Kconfig | 106 tristate "TS-CAN1 PC104 boards" 110 https://www.embeddedts.com/products/TS-CAN1
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8-apalis-eval.dtsi | 38 /* Apalis CAN1 */
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H A D | imx8-apalis-ixora-v1.1.dtsi | 78 /* Apalis CAN1 */
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H A D | imx8mp-evk.dts | 469 "CAN1/I2C5_SEL", 493 /* GPIO 2 of PCA6416 is used to switch between CAN1 and I2C5 functions: 494 * LOW: CAN1 (default, pull-down)
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H A D | imx8-apalis-ixora-v1.2.dtsi | 108 /* Apalis CAN1 */
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H A D | imx8-ss-dma.dtsi | 332 * CAN1 shares CAN0's clock and to enable CAN0's clock it
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H A D | imx8-apalis-v1.1.dtsi | 269 /* Apalis CAN1 */ 965 /* Apalis CAN1 */
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/openbmc/linux/arch/powerpc/boot/dts/ |
H A D | pcm030.dts | 31 /* PSC2 port is used by CAN1/2 */
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H A D | pcm032.dts | 33 /* PSC2 port is used by CAN1/2 */
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H A D | acadia.dts | 156 CAN1: can@ef601800 { label
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/openbmc/linux/arch/arm/boot/dts/renesas/ |
H A D | r9a06g032-rzn1d400-db.dts | 33 /* Assuming CN10/CN11 are wired for CAN1 */
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/openbmc/linux/arch/arm/boot/dts/st/ |
H A D | stm32f746.dtsi | 362 resets = <&rcc STM32F7_APB1_RESET(CAN1)>; 363 clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>; 372 clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>;
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H A D | stm32f429.dtsi | 370 resets = <&rcc STM32F4_APB1_RESET(CAN1)>; 371 clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; 380 clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
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/openbmc/linux/drivers/pinctrl/ |
H A D | pinctrl-lpc18xx.c | 259 LPC_P(1,17, GPIO, UART2, R, ENET, TIMER0, CAN1, SGPIO, R, 0, HD); 260 LPC_P(1,18, GPIO, UART2, R, ENET, TIMER0, CAN1, SGPIO, R, 0, ND); 294 LPC_P(4,8, R, CTIN, LCD, R, GPIO, LCD_ALT, CAN1, SGPIO, 0, ND); 295 LPC_P(4,9, R, CTIN, LCD, R, GPIO, LCD_ALT, CAN1, SGPIO, 0, ND); 386 LPC_P(e,0, R, R, R, EMC, GPIO, CAN1, R, R, 0, ND); 387 LPC_P(e,1, R, R, R, EMC, GPIO, CAN1, R, R, 0, ND);
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/openbmc/u-boot/arch/arm/dts/ |
H A D | tegra30-apalis.dts | 243 /* SPI6: CAN1 */
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/openbmc/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra30-apalis.dtsi | 105 /* Apalis CAN1 on SPI6 */ 1056 /* SPI6: CAN1 */
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H A D | tegra30-apalis-v1.1.dtsi | 106 /* Apalis CAN1 on SPI6 */ 1073 /* SPI6: CAN1 */
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6ull-colibri.dtsi | 478 pinctrl_gpio7: gpio7grp { /* CAN1 */
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/openbmc/linux/arch/arm/boot/dts/microchip/ |
H A D | at91-sam9x60ek.dts | 452 AT91_PIOD 19 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_DOWN /* Enable CAN1 mux */
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