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Searched refs:CACHE_EVENT_PTR (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/arch/powerpc/perf/
H A Dpower10-pmu.c159 CACHE_EVENT_PTR(PM_LD_MISS_L1),
160 CACHE_EVENT_PTR(PM_LD_REF_L1),
162 CACHE_EVENT_PTR(PM_ST_MISS_L1),
169 CACHE_EVENT_PTR(PM_BR_CMPL),
170 CACHE_EVENT_PTR(PM_DTLB_MISS),
171 CACHE_EVENT_PTR(PM_ITLB_MISS),
185 CACHE_EVENT_PTR(PM_LD_REF_L1),
195 CACHE_EVENT_PTR(PM_L2_ST),
197 CACHE_EVENT_PTR(PM_BR_CMPL),
198 CACHE_EVENT_PTR(PM_DTLB_MISS),
[all …]
H A Dpower8-pmu.c164 CACHE_EVENT_PTR(PM_LD_MISS_L1),
165 CACHE_EVENT_PTR(PM_LD_REF_L1),
166 CACHE_EVENT_PTR(PM_L1_PREF),
167 CACHE_EVENT_PTR(PM_ST_MISS_L1),
169 CACHE_EVENT_PTR(PM_INST_FROM_L1),
173 CACHE_EVENT_PTR(PM_L3_PREF_ALL),
174 CACHE_EVENT_PTR(PM_L2_ST_MISS),
175 CACHE_EVENT_PTR(PM_L2_ST),
178 CACHE_EVENT_PTR(PM_BRU_FIN),
180 CACHE_EVENT_PTR(PM_DTLB_MISS),
[all …]
H A Dpower9-pmu.c204 CACHE_EVENT_PTR(PM_LD_REF_L1),
205 CACHE_EVENT_PTR(PM_L1_PREF),
206 CACHE_EVENT_PTR(PM_ST_MISS_L1),
208 CACHE_EVENT_PTR(PM_INST_FROM_L1),
209 CACHE_EVENT_PTR(PM_IC_PREF_WRITE),
211 CACHE_EVENT_PTR(PM_DATA_FROM_L3),
212 CACHE_EVENT_PTR(PM_L3_PREF_ALL),
213 CACHE_EVENT_PTR(PM_BR_MPRED_CMPL),
214 CACHE_EVENT_PTR(PM_BR_CMPL),
215 CACHE_EVENT_PTR(PM_DTLB_MISS),
[all …]
H A Dgeneric-compat-pmu.c123 CACHE_EVENT_PTR(PM_LD_MISS_L1),
124 CACHE_EVENT_PTR(PM_ST_MISS_L1),
125 CACHE_EVENT_PTR(PM_L1_ICACHE_MISS),
126 CACHE_EVENT_PTR(PM_DATA_FROM_L3MISS),
127 CACHE_EVENT_PTR(PM_BR_MPRED_CMPL),
128 CACHE_EVENT_PTR(PM_DTLB_MISS),
129 CACHE_EVENT_PTR(PM_ITLB_MISS),
/openbmc/linux/arch/powerpc/include/asm/
H A Dperf_event_server.h181 #define CACHE_EVENT_PTR(_id) EVENT_PTR(_id, _c) macro