Searched refs:AST_SCU_BASE (Results 1 – 3 of 3) sorted by relevance
15 #define AST_SCU_BASE 0x1E6E2000 macro123 uint32_t regs[] = { AST_SCU_BASE + AST2500_SCU_PROT_REG }; in test_2500_protection_register()139 uint32_t regs[] = { AST_SCU_BASE + AST2600_SCU_PROT_REG, in test_2600_protection_register()140 AST_SCU_BASE + AST2600_SCU_PROT_REG2 }; in test_2600_protection_register()202 AST_SCU_BASE + AST2500_SCU_PROT_REG, in test_2500_write_permission_lock_state()203 AST_SCU_BASE + AST2500_SCU_MISC_2_CONTROL_REG in test_2500_write_permission_lock_state()211 AST_SCU_BASE + AST2600_SCU_PROT_REG, in test_2600_write_permission_lock_state()212 AST_SCU_BASE + AST2600_SCU_MISC_2_CONTROL_REG in test_2600_write_permission_lock_state()
11 #define AST_SCU_BASE (0x1E6E2000) macro12 #define AST_SCU_HW_STRAP1 (AST_SCU_BASE + 0x500)13 #define AST_SCU_HW_STRAP2 (AST_SCU_BASE + 0x510)
163 + val = readl(AST_SCU_BASE + AST_SCU_HW_STRAP1);165 + writel(val, AST_SCU_BASE + AST_SCU_HW_STRAP1);172 + val = readl(AST_SCU_BASE + AST_SCU_PCIE_CONFIG_SET);177 + writel(val, AST_SCU_BASE + AST_SCU_PCIE_CONFIG_SET);232 + val = readl(AST_SCU_BASE + AST_SCU_HW_STRAP1);234 + writel(val, AST_SCU_BASE + AST_SCU_HW_STRAP1);241 + val = readl(AST_SCU_BASE + AST_SCU_PCIE_CONFIG_SET);246 + writel(val, AST_SCU_BASE + AST_SCU_PCIE_CONFIG_SET);249 + val = readl(AST_SCU_BASE + AST_SCU_MISC1_CTRL);251 + writel(val, AST_SCU_BASE + AST_SCU_MISC1_CTRL);