Home
last modified time | relevance | path

Searched refs:ASE_MIPS16 (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/mips/
H A Dmips-defs.h28 #define ASE_MIPS16 0x0000000001000000ULL macro
H A Dcpu-defs.c.inc97 .insn_flags = CPU_MIPS32R1 | ASE_MIPS16,
157 .insn_flags = CPU_MIPS32R1 | ASE_MIPS16,
199 .insn_flags = CPU_MIPS32R2 | ASE_MIPS16,
221 .insn_flags = CPU_MIPS32R2 | ASE_MIPS16,
243 .insn_flags = CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP,
269 .insn_flags = CPU_MIPS32R2 | ASE_MIPS16,
317 .insn_flags = CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP,
343 .insn_flags = CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP | ASE_DSP_R2,
/openbmc/qemu/linux-user/mips/
H A Dsignal.c190 if (env->insn_flags & (ASE_MIPS16 | ASE_MICROMIPS)) { in mips_set_hflags_isa_mode_from_pc()
/openbmc/qemu/target/mips/tcg/
H A Dtranslate.c10963 if (ctx->insn_flags & (ASE_MIPS16 | ASE_MICROMIPS)) { in gen_branch()
14985 check_insn(ctx, ASE_MIPS16 | ASE_MICROMIPS); in decode_opc_legacy()
15152 } else if (ctx->insn_flags & ASE_MIPS16) { in mips_tr_translate_insn()