Searched refs:AR934X_SRIF_DDR_DPLL2_REG (Results 1 – 4 of 4) sorted by relevance
116 writel(0x13210f00, srif_regs + AR934X_SRIF_DDR_DPLL2_REG); in ar934x_pll_init()
280 pll = __raw_readl(dpll_base + AR934X_SRIF_DDR_DPLL2_REG); in ar934x_clocks_init()
1129 #define AR934X_SRIF_DDR_DPLL2_REG 0x244 macro
995 #define AR934X_SRIF_DDR_DPLL2_REG 0x244 macro