Searched refs:AR934X_SRIF_DDR_DPLL1_REG (Results 1 – 4 of 4) sorted by relevance
194 ar934x_srif_pll_cfg(srif_regs + AR934X_SRIF_DDR_DPLL1_REG, ddr_srif); in ar934x_pll_init()
284 pll = __raw_readl(dpll_base + AR934X_SRIF_DDR_DPLL1_REG); in ar934x_clocks_init()
1128 #define AR934X_SRIF_DDR_DPLL1_REG 0x240 macro
994 #define AR934X_SRIF_DDR_DPLL1_REG 0x240 macro