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Searched refs:AR934X_PLL_DDR_CONFIG_PLLPWD (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/ar934x/
H A Dclk.c178 writel(ddr_pll | AR934X_PLL_DDR_CONFIG_PLLPWD, in ar934x_pll_init()
/openbmc/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h381 #define AR934X_PLL_DDR_CONFIG_PLLPWD BIT(30) macro