Searched refs:AR71XX_DDR_REG_TAP_CTRL0 (Results 1 – 4 of 4) sorted by relevance
180 writel(DDR_TAP_VAL0, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_init()224 writel(DDR_TAP_VAL0, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_init()266 tap = readl(regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_tap_tuning()274 writel(val, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_tap_tuning()329 writel(val, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_tap_tuning()
296 writel(DDR1_TAP_VAL, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_init()402 writel(DDR2_TAP_VAL, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_init()417 tap_val = readl(regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_tap_tuning()424 writel(tap, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_tap_tuning()467 writel(tap_val, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_tap_tuning()
135 writel(memcfg->tap, ddr_regs + AR71XX_DDR_REG_TAP_CTRL0); in ar934x_ddr_init()
214 #define AR71XX_DDR_REG_TAP_CTRL0 0x1c macro