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Searched refs:AR71XX_DDR_REG_RD_CYCLE (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/ar933x/
H A Dddr.c186 writel(0xff, regs + AR71XX_DDR_REG_RD_CYCLE); in ddr_init()
230 writel(0xff, regs + AR71XX_DDR_REG_RD_CYCLE); in ddr_init()
/openbmc/u-boot/arch/mips/mach-ath79/ar934x/
H A Dddr.c147 writel(cycle, ddr_regs + AR71XX_DDR_REG_RD_CYCLE); in ar934x_ddr_init()
/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c232 writel(0xffff, regs + AR71XX_DDR_REG_RD_CYCLE); in ddr_init()
310 writel(0xffff, regs + AR71XX_DDR_REG_RD_CYCLE); in ddr_init()
/openbmc/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h213 #define AR71XX_DDR_REG_RD_CYCLE 0x18 macro