Searched refs:AR71XX_DDR_REG_EMR (Results 1 – 4 of 4) sorted by relevance
| /openbmc/u-boot/arch/mips/mach-ath79/ar933x/ |
| H A D | ddr.c | 137 writel(0x00, regs + AR71XX_DDR_REG_EMR); in ddr_init()
161 writel(DDR2_EXT_MODE_OCD_VAL, regs + AR71XX_DDR_REG_EMR); in ddr_init()
167 writel(DDR2_EXT_MODE_VAL, regs + AR71XX_DDR_REG_EMR); in ddr_init()
201 writel(DDR1_EXT_MODE_VAL, regs + AR71XX_DDR_REG_EMR); in ddr_init()
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| /openbmc/u-boot/arch/mips/mach-ath79/ar934x/ |
| H A D | ddr.c | 108 writel(memcfg->mode | 0x100, ddr_regs + AR71XX_DDR_REG_EMR); in ar934x_ddr_init()
116 writel(0x402, ddr_regs + AR71XX_DDR_REG_EMR); in ar934x_ddr_init()
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| /openbmc/u-boot/arch/mips/mach-ath79/qca953x/ |
| H A D | ddr.c | 258 writel(DDR1_EXT_MODE_VAL, regs + AR71XX_DDR_REG_EMR); in ddr_init()
348 writel(DDR2_EXT_MODE_VAL, regs + AR71XX_DDR_REG_EMR); in ddr_init()
382 writel(DDR2_EXT_MODE_OCD_VAL, regs + AR71XX_DDR_REG_EMR); in ddr_init()
390 writel(DDR2_EXT_MODE_VAL, regs + AR71XX_DDR_REG_EMR); in ddr_init()
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| /openbmc/u-boot/arch/mips/mach-ath79/include/mach/ |
| H A D | ar71xx_regs.h | 210 #define AR71XX_DDR_REG_EMR 0x0c macro
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