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Searched refs:AR71XX_DDR_REG_CONFIG2 (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/ar934x/
H A Dddr.c95 writel(memcfg->config2, ddr_regs + AR71XX_DDR_REG_CONFIG2); in ar934x_ddr_init()
/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c248 writel(DDR1_CONF2_REG_VAL, regs + AR71XX_DDR_REG_CONFIG2); in ddr_init()
326 writel(DDR2_CONF2_REG_VAL, regs + AR71XX_DDR_REG_CONFIG2); in ddr_init()
/openbmc/u-boot/arch/mips/mach-ath79/ar933x/
H A Dddr.c112 writel(DDR_CONF2_REG_VAL, regs + AR71XX_DDR_REG_CONFIG2); in ddr_init()
/openbmc/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h208 #define AR71XX_DDR_REG_CONFIG2 0x04 macro