Home
last modified time | relevance | path

Searched refs:AR71XX_DDR_REG_CONFIG (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/ar934x/
H A Dddr.c92 writel(memcfg->config1, ddr_regs + AR71XX_DDR_REG_CONFIG); in ar934x_ddr_init()
/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c246 writel(DDR1_CONF_REG_VAL, regs + AR71XX_DDR_REG_CONFIG); in ddr_init()
324 writel(DDR2_CONF_REG_VAL, regs + AR71XX_DDR_REG_CONFIG); in ddr_init()
/openbmc/u-boot/arch/mips/mach-ath79/ar933x/
H A Dddr.c111 writel(DDR_CONF_REG_VAL, regs + AR71XX_DDR_REG_CONFIG); in ddr_init()
/openbmc/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h207 #define AR71XX_DDR_REG_CONFIG 0x00 macro