Searched refs:AMDGPU_SDMA_IRQ_INSTANCE0 (Results 1 – 11 of 11) sorted by relevance
32 AMDGPU_SDMA_IRQ_INSTANCE0 = 0, enumerator
504 (i == 0) ? AMDGPU_SDMA_IRQ_INSTANCE0 : in si_dma_sw_init()593 case AMDGPU_SDMA_IRQ_INSTANCE0: in si_dma_set_trap_irq_state()
110 AMDGPU_SDMA_IRQ_INSTANCE0 + i); in amdgpu_sdma_ras_late_init()
1358 AMDGPU_SDMA_IRQ_INSTANCE0 + i, in sdma_v4_4_2_sw_init()1379 AMDGPU_SDMA_IRQ_INSTANCE0 + i, in sdma_v4_4_2_sw_init()1441 AMDGPU_SDMA_IRQ_INSTANCE0 + i); in sdma_v4_4_2_hw_fini()2072 AMDGPU_SDMA_IRQ_INSTANCE0 + i); in sdma_v4_4_2_xcp_suspend()
866 (i == 0) ? AMDGPU_SDMA_IRQ_INSTANCE0 : in sdma_v2_4_sw_init()1003 case AMDGPU_SDMA_IRQ_INSTANCE0: in sdma_v2_4_set_trap_irq_state()
975 (i == 0) ? AMDGPU_SDMA_IRQ_INSTANCE0 : in cik_sdma_sw_init()1110 case AMDGPU_SDMA_IRQ_INSTANCE0: in cik_sdma_set_trap_irq_state()
1391 (i == 0) ? AMDGPU_SDMA_IRQ_INSTANCE0 : in sdma_v5_0_sw_init()1550 u32 reg_offset = (type == AMDGPU_SDMA_IRQ_INSTANCE0) ? in sdma_v5_0_set_trap_irq_state()1817 adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE0 + in sdma_v5_0_set_irq_funcs()
1150 (i == 0) ? AMDGPU_SDMA_IRQ_INSTANCE0 : in sdma_v3_0_sw_init()1337 case AMDGPU_SDMA_IRQ_INSTANCE0: in sdma_v3_0_set_trap_irq_state()
1833 AMDGPU_SDMA_IRQ_INSTANCE0 + i, in sdma_v4_0_sw_init()1867 AMDGPU_SDMA_IRQ_INSTANCE0 + i, in sdma_v4_0_sw_init()1929 AMDGPU_SDMA_IRQ_INSTANCE0 + i); in sdma_v4_0_hw_fini()
1267 AMDGPU_SDMA_IRQ_INSTANCE0 + i, in sdma_v5_2_sw_init()1774 adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE0 + in sdma_v5_2_set_irq_funcs()
1308 AMDGPU_SDMA_IRQ_INSTANCE0 + i, in sdma_v6_0_sw_init()1612 adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE0 + in sdma_v6_0_set_irq_funcs()