|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
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|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24 |
|
| #
c0beff4e |
| 28-Mar-2024 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify
drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
[ Upstream commit f886b49feaae30acd599e37d4284836024b0f3ed ]
SDMA_CNTL is not set in some cases, driver configures it by itself.
v2: simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
| #
65356a1c |
| 10-Apr-2024 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amdgpu: Assign correct bits for SDMA HDP flush
commit aebd3eb9d3ae017e6260043f6bcace2f5ef60694 upstream.
HDP Flush request bit can be kept unique per AID, and doesn't need to be
unique SOC-wide
drm/amdgpu: Assign correct bits for SDMA HDP flush
commit aebd3eb9d3ae017e6260043f6bcace2f5ef60694 upstream.
HDP Flush request bit can be kept unique per AID, and doesn't need to be
unique SOC-wide. Assign only bits 10-13 for SDMA v4.4.2.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
show more ...
|
| #
65356a1c |
| 10-Apr-2024 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amdgpu: Assign correct bits for SDMA HDP flush
commit aebd3eb9d3ae017e6260043f6bcace2f5ef60694 upstream.
HDP Flush request bit can be kept unique per AID, and doesn't need to be
unique SOC-wide
drm/amdgpu: Assign correct bits for SDMA HDP flush
commit aebd3eb9d3ae017e6260043f6bcace2f5ef60694 upstream.
HDP Flush request bit can be kept unique per AID, and doesn't need to be
unique SOC-wide. Assign only bits 10-13 for SDMA v4.4.2.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
show more ...
|
| #
65356a1c |
| 10-Apr-2024 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amdgpu: Assign correct bits for SDMA HDP flush
commit aebd3eb9d3ae017e6260043f6bcace2f5ef60694 upstream.
HDP Flush request bit can be kept unique per AID, and doesn't need to be
unique SOC-wide
drm/amdgpu: Assign correct bits for SDMA HDP flush
commit aebd3eb9d3ae017e6260043f6bcace2f5ef60694 upstream.
HDP Flush request bit can be kept unique per AID, and doesn't need to be
unique SOC-wide. Assign only bits 10-13 for SDMA v4.4.2.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
show more ...
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Revision tags: v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36 |
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| #
67af6916 |
| 26-Jun-2023 |
Le Ma <le.ma@amd.com> |
drm/amdgpu: remove duplicated doorbell range init for sdma v4.4.2
Handled in earlier phase
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Ale
drm/amdgpu: remove duplicated doorbell range init for sdma v4.4.2
Handled in earlier phase
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
show more ...
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Revision tags: v6.4, v6.1.35 |
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| #
7f03b1d1 |
| 21-Jun-2023 |
Mangesh Gadre <Mangesh.Gadre@amd.com> |
drm/amdgpu:Remove sdma halt/unhalt during frontdoor load
sdma halt/unhalt is performed by psp when frontdoor
loading used,so this can be skipped.
v2: Instead of removing halt/unhalt completely,
drm/amdgpu:Remove sdma halt/unhalt during frontdoor load
sdma halt/unhalt is performed by psp when frontdoor
loading used,so this can be skipped.
v2: Instead of removing halt/unhalt completely,
driver will do it only during backdoor load.
Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
show more ...
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Revision tags: v6.1.34, v6.1.33 |
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| #
e5df16d9 |
| 07-Jun-2023 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/sdma4: set align mask to 255
The wptr needs to be incremented at at least 64 dword intervals,
use 256 to align with windows. This should fix potential hangs
with unaligned updates.
Revi
drm/amdgpu/sdma4: set align mask to 255
The wptr needs to be incremented at at least 64 dword intervals,
use 256 to align with windows. This should fix potential hangs
with unaligned updates.
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
show more ...
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| #
82a1f42f |
| 13-Jun-2023 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amdgpu: Release SDMAv4.4.2 ecc irq properly
Release ECC irq only if irq is enabled - only when RAS feature is enabled
ECC irq gets enabled.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Review
drm/amdgpu: Release SDMAv4.4.2 ecc irq properly
Release ECC irq only if irq is enabled - only when RAS feature is enabled
ECC irq gets enabled.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
show more ...
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