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Searched refs:AMDGPU_GPU_PAGE_SIZE (Results 1 – 25 of 30) sorted by relevance

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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_gart.h35 #define AMDGPU_GPU_PAGE_SIZE 4096 macro
36 #define AMDGPU_GPU_PAGE_MASK (AMDGPU_GPU_PAGE_SIZE - 1)
40 #define AMDGPU_GPU_PAGES_IN_CPU_PAGE (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE)
H A Damdgpu_gart.c308 t = offset / AMDGPU_GPU_PAGE_SIZE; in amdgpu_gart_unbind()
318 page_base += AMDGPU_GPU_PAGE_SIZE; in amdgpu_gart_unbind()
353 t = offset / AMDGPU_GPU_PAGE_SIZE; in amdgpu_gart_map()
359 page_base += AMDGPU_GPU_PAGE_SIZE; in amdgpu_gart_map()
428 if (PAGE_SIZE < AMDGPU_GPU_PAGE_SIZE) { in amdgpu_gart_init()
437 adev->gart.num_gpu_pages = adev->gmc.gart_size / AMDGPU_GPU_PAGE_SIZE; in amdgpu_gart_init()
H A Damdgpu_benchmark.c177 r = amdgpu_benchmark_move(adev, i * AMDGPU_GPU_PAGE_SIZE, in amdgpu_benchmark()
190 r = amdgpu_benchmark_move(adev, i * AMDGPU_GPU_PAGE_SIZE, in amdgpu_benchmark()
203 r = amdgpu_benchmark_move(adev, i * AMDGPU_GPU_PAGE_SIZE, in amdgpu_benchmark()
H A Damdgpu_sa.c53 r = amdgpu_bo_create_kernel(adev, size, AMDGPU_GPU_PAGE_SIZE, domain, in amdgpu_sa_bo_manager_init()
H A Damdgpu_object.h234 return bo->tbo.base.size / AMDGPU_GPU_PAGE_SIZE; in amdgpu_bo_ngpu_pages()
239 return (bo->tbo.page_alignment << PAGE_SHIFT) / AMDGPU_GPU_PAGE_SIZE; in amdgpu_bo_gpu_page_alignment()
H A Damdgpu_vm.c931 (last - start + 1) * AMDGPU_GPU_PAGE_SIZE, &cursor); in amdgpu_vm_update_range()
980 amdgpu_res_next(&cursor, num_entries * AMDGPU_GPU_PAGE_SIZE); in amdgpu_vm_update_range()
1567 saddr /= AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_bo_map()
1568 eaddr = saddr + (size - 1) / AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_bo_map()
1636 saddr /= AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_bo_replace_map()
1637 eaddr = saddr + (size - 1) / AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_bo_replace_map()
1671 saddr /= AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_bo_unmap()
1730 saddr /= AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_bo_clear_mappings()
1731 eaddr = saddr + (size - 1) / AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_bo_clear_mappings()
2597 addr /= AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_handle_fault()
H A Damdgpu_vce.c457 r = amdgpu_ib_get(ring->adev, NULL, AMDGPU_GPU_PAGE_SIZE * 2, in amdgpu_vce_get_create_msg()
672 (mapping->last + 1) * AMDGPU_GPU_PAGE_SIZE) { in amdgpu_vce_cs_reloc()
678 addr -= mapping->start * AMDGPU_GPU_PAGE_SIZE; in amdgpu_vce_cs_reloc()
H A Damdgpu_vm_pt.c516 bp.byte_align = AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_pt_create()
1019 incr = (uint64_t)AMDGPU_GPU_PAGE_SIZE << shift; in amdgpu_vm_ptes_update()
H A Damdgpu_kms.c836 vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE; in amdgpu_info_ioctl()
852 dev_info->virtual_address_alignment = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE); in amdgpu_info_ioctl()
853 dev_info->pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE; in amdgpu_info_ioctl()
854 dev_info->gart_page_size = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE); in amdgpu_info_ioctl()
H A Damdgpu_vcn.c583 r = amdgpu_ib_get(adev, NULL, AMDGPU_GPU_PAGE_SIZE * 2, in amdgpu_vcn_dec_get_create_msg()
618 r = amdgpu_ib_get(adev, NULL, AMDGPU_GPU_PAGE_SIZE * 2, in amdgpu_vcn_dec_get_destroy_msg()
973 r = amdgpu_ib_get(adev, NULL, (128 << 10) + AMDGPU_GPU_PAGE_SIZE, in amdgpu_vcn_enc_ring_test_ib()
H A Damdgpu_cs.c1045 (m->last + 1) * AMDGPU_GPU_PAGE_SIZE) { in amdgpu_cs_patch_ibs()
1055 kptr += va_start - (m->start * AMDGPU_GPU_PAGE_SIZE); in amdgpu_cs_patch_ibs()
1786 addr /= AMDGPU_GPU_PAGE_SIZE; in amdgpu_cs_find_mapping()
H A Damdgpu_uvd.c923 end = end * AMDGPU_GPU_PAGE_SIZE + start; in amdgpu_uvd_cs_pass2()
925 addr -= mapping->start * AMDGPU_GPU_PAGE_SIZE; in amdgpu_uvd_cs_pass2()
H A Damdgpu_gem.c703 vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE; in amdgpu_gem_va_ioctl()
H A Dvcn_v4_0.c1681 start = map->start * AMDGPU_GPU_PAGE_SIZE; in vcn_v4_0_dec_msg()
1682 end = (map->last + 1) * AMDGPU_GPU_PAGE_SIZE; in vcn_v4_0_dec_msg()
H A Damdgpu_virt.c401 AMDGPU_GPU_PAGE_SIZE, in amdgpu_virt_ras_reserve_bps()
H A Dgfx_v6_0.c2069 tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz; in gfx_v6_0_cp_gfx_resume()
2158 tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz; in gfx_v6_0_cp_compute_resume()
2178 tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz; in gfx_v6_0_cp_compute_resume()
H A Dvcn_v3_0.c1802 start = map->start * AMDGPU_GPU_PAGE_SIZE; in vcn_v3_0_dec_msg()
1803 end = (map->last + 1) * AMDGPU_GPU_PAGE_SIZE; in vcn_v3_0_dec_msg()
H A Damdgpu_ras.c2009 .size = AMDGPU_GPU_PAGE_SIZE, in amdgpu_ras_badpages_read()
2143 AMDGPU_GPU_PAGE_SIZE); in amdgpu_ras_add_bad_pages()
H A Dmes_v10_1.c692 ((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8)); in mes_v10_1_mqd_init()
H A Dmes_v11_0.c772 ((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8)); in mes_v11_0_mqd_init()
H A Dvcn_v1_0.c1929 mapping = amdgpu_vm_bo_lookup_mapping(vm, addr/AMDGPU_GPU_PAGE_SIZE); in vcn_v1_0_validate_bo()
H A Dgfx_v7_0.c2551 tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz; in gfx_v7_0_cp_gfx_resume()
2899 (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8); in gfx_v7_0_mqd_init()
H A Damdgpu_ttm.c225 AMDGPU_GPU_PAGE_SIZE; in amdgpu_ttm_map_buffer()
H A Damdgpu_psp.c3651 AMDGPU_GPU_PAGE_SIZE, in amdgpu_psp_vbflash_read()
H A Dgfx_v9_4_3.c1548 ((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8)); in gfx_v9_4_3_xcc_mqd_init()

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